1. Field of the Invention
This invention relates to a metal oxide semiconductor (MOS) input circuit having hysteresis to provide an increased noise margin and clearly distinguishable logic level output signals.
2. Statement of the Prior Art
Prior art input circuits such as those capable of receiving fixed TTL logic level input signals (e.g. 0.8 and 2.0 volts) and providing corresponding MOS compatible logic level output signals (0.2 and 4.0 volts), are plagued by similar problems. Examples of prior art input circuits that include the interconnection of enhancement and depletion-type field effect transistors can be found in the following U.S. Pat. Nos.:
3,761,899: Sept. 25, 1973 PA1 3,821,717: June 28, 1974 PA1 3,969,633: July 13, 1976 PA1 3,995,172: Nov. 30, 1976 PA1 3,612,908: Oct. 12, 1971 PA1 3,882,331: May 6, 1975 PA1 3,904,888: Sept. 9, 1975 PA1 4,097,772: June 27, 1978
Typically, in order to accommodate relatively low voltage input signals, prior art input circuits are fabricated with field effect transistors having relatively wide channel widths. As a result, the size and associated costs of the input circuit is increased. Moreover, the parasitic capacitance of the transistor devices is, accordingly, increased which undesirably slows down circuit operation. Should the input circuit be subjected to unwanted noise when the input logic level signals have a narrow voltage swing, the MOS true and false logic level output signals frequently become substantially indistinguishable from one another, so that an uncertain output state appears to exist. One way to adequately reduce the effects of noise at the input terminal of an input circuit is to develop hysteresis within the circuit. Examples of those MOS input circuits having hysteresis can be found in the following U.S. Pat. Nos.:
However, none of the above-identified patents shows or discloses the hereinafter claimed input circuit comprising three inverter stages, which circuit includes depletion and enhancement-type transistor devices interconnected to establish a positive feedback path so as to provide hysteresis, whereby a wide band of noise rejection is provided at the circuit input terminal.